PSB5045EE:Comprehensive Assignment Overview – Coventry University & PSB Academy| Question pdf-nov 2024
| University | Coventry University (CU) |
| Subject | Analogue And Digital Electronics 2 |
Question Paper
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Question 1 (40 Marks)
In an industrial plant, a liquid is added to a drum and then stirred. After sufficient time, the drum is emptied. The sequence of operations is:
- A pump is switched on to fill a drum.
- When partly full, a motor rotates it to stir the contents.
- When full, the pump is switched off.
- The motor continues to stir for a short time.
- The motor is then turned off.
- A valve opens to empty the drum.
- All devices are switched off and the sequence is repeated.
Use a synchronous counter to design the above requirement.
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a. Design the truth table for the above requirement using the D Flip flop.
- (i) Determine the state and number of states. (12 Marks)
- (ii) Assign the state number and tabulate the state table. (6 Marks)
- (iii) Tabulate state transition and excitation table for D flip-flops. (Include unused states as x) (6 Marks)
b. Explain and derive the drive logic for the above application. (10 Marks)
c. Implement the circuit using D Flip flop and draw the relevant circuit diagram to match the sequence. (6 Marks)
Question 2 (30 Marks)
The state diagram of a sequential circuit is given in Figure 2.
a. Tabulate the state diagram into a related state table. (4 Marks)
b. Reduce the state table to a minimum number of states using row matching. (10 Marks)
c. Repeat b) using an implication chart. Please provide the complete steps for using the table. (10 Marks)
d. Draw the reduced state diagram. (6 Marks)
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Question 3 (30 Marks)
a. Perform an Internet search and find the block diagram and truth table of the 4×2 Decoder. Write a VHDL code for the 2×4 Decoder (Ignore the syntax and write only the Logic with relevant input and output stated). (15 Marks)
- (i) Draw the block diagram of the decoder. (2 Marks)
- (ii) Tablet the truth table for this decoder. (3 Marks)
- (iii) use the case statement to write the VHDL code based on your truth table. (10 Marks)
b. Write the test bench for the above VHDL code. (Ignore the syntax). (10 Marks)
c. Implement in a simulator to verify your code. (5 Marks)
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